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  • 参数资料
    型号: Am29LV004BB-120EEB
    厂商: Advanced Micro Devices, Inc.
    英文描述: 4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
    中文描述: 4兆位(512亩× 8位)的CMOS 3.0伏,只引导扇区闪存
    文件页数: 2/6页
    文件大?。?/td> 39K
    代理商: AM29LV004BB-120EEB
    2
    Am29LV004B
    A D V A N C E I N F O R M A T I O N
    GENERAL DESCRIPTION
    The Am29LV004B is an 4 Mbit, 3.0 volt-only Flash
    memory organized as 524,288 bytes. The device is
    offered in a 40-pin TSOP package. The byte-wide (x8)
    data appears on DQ7–DQ0. This device requires only
    a single, 3.0 volt V
    CC
    supply to perform read, program,
    and erase operations. A standard EPROM pro-
    grammer can also be used to program and erase the
    device.
    This device is manufactured using AMD’s 0.35
    μ
    m
    process technology, and offers all the features and ben-
    efits of the Am29LV004, which was manufactured using
    0.5
    μ
    m process technology. In addition, the
    Am29LV004B features unlock bypass programming
    and in-system sector protection/unprotection.
    The standard device offers access times of 70, 80, 90,
    and 120 ns, allowing high speed microprocessors to
    operate without wait states. To eliminate bus contention
    the device has separate chip enable (CE#), write
    enable (WE#) and output enable (OE#) controls.
    The device requires only a
    single 3.0 volt power sup-
    ply
    for both read and write functions. Internally gener-
    ated and regulated voltages are provided for the
    program and erase operations.
    The device is entirely command set compatible with the
    JEDEC single-power-supply Flash standard
    . Com-
    mands are written to the command register using stan-
    dard microprocessor write timings. Register contents
    serve as input to an internal state-machine that con-
    trols the erase and programming circuitry. Write cycles
    also internally latch addresses and data needed for the
    programming and erase operations. Reading data out
    of the device is similar to reading from other Flash or
    EPROM devices.
    Device programming occurs by executing the program
    command sequence. This initiates the
    Embedded
    Program
    algorithm—an internal algorithm that auto-
    matically times the program pulse widths and verifies
    proper cell margin. The
    Unlock Bypass
    mode facili-
    tates faster programming times by requiring only two
    write cycles to program data instead of four.
    Device erasure occurs by executing the erase command
    sequence. This initiates the
    Embedded Erase
    algo-
    rithm—an internal algorithm that automatically prepro-
    grams the array (if it is not already programmed) before
    executing the erase operation. During erase, the device
    automatically times the erase pulse widths and verifies
    proper cell margin.
    The host system can detect whether a program or
    erase operation is complete by observing the RY/BY#
    pin, or by reading the DQ7 (Data# Polling) and DQ6
    (toggle)
    status bits
    . After a program or erase cycle has
    been completed, the device is ready to read array data
    or accept another command.
    The
    sector erase architecture
    allows memory sectors
    to be erased and reprogrammed without affecting the
    data contents of other sectors. The device is fully
    erased when shipped from the factory.
    Hardware data protection
    measures include a low
    V
    CC
    detector that automatically inhibits write opera-
    tions during power transitions. The
    hardware sector
    protection
    feature disables both program and erase
    operations in any combination of the sectors of mem-
    ory. This can be achieved in-system or via program-
    ming equipment.
    The
    Erase Suspend
    feature enables the user to put
    erase on hold for any period of time to read data from,
    or program data to, any sector that is not selected for
    erasure. True background erase can thus be achieved.
    The
    hardware RESET# pin
    terminates any operation
    in progress and resets the internal state machine to
    reading array data. The RESET# pin may be tied to the
    system reset circuitry. A system reset would thus also
    reset the device, enabling the system microprocessor
    to read the boot-up firmware from the Flash memory.
    The device offers two power-saving features. When ad-
    dresses have been stable for a specified amount of
    time, the device enters the
    automatic sleep mode
    .
    The system can also place the device into the
    standby
    mode
    . Power consumption is greatly reduced in both
    these modes.
    AMD’s Flash technology combines years of Flash
    memory manufacturing experience to produce the
    highest levels of quality, reliability and cost effective-
    ness. The device electrically erases all bits within
    a sector simultaneously via Fowler-Nordheim tun-
    neling. The data is programmed using hot electron
    injection.
    相关PDF资料
    PDF描述
    Am29LV004BB-120EIB 4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
    Am29LV004BB-120FCB 4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
    Am29LV004BB-120FEB 4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
    Am29LV004BB-120FIB 4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
    Am29LV004BT-120ECB Piano DIP switches can come with top side off or top side on options
    相关代理商/技术参数
    参数描述
    AM29LV004BB-120EI 制造商:Rochester Electronics LLC 功能描述: 制造商:Advanced Micro Devices 功能描述:NOR Flash, 512K x 8, 40 Pin, Plastic, TSSOP
    AM29LV004BB120EI\T 制造商:Advanced Micro Devices 功能描述:4 Mb (512K x 8) Boot Sector, Flash Memory
    AM29LV004BB-120EIT 制造商:Rochester Electronics LLC 功能描述: 制造商:Advanced Micro Devices 功能描述:
    am29lv004bt-120ed 制造商:Advanced Micro Devices 功能描述:
    AM29LV004BT-90EI 制造商:Advanced Micro Devices 功能描述:
  • 2015第十届中国常州先进制造技术成果展示洽谈会——中国常州网专题 2019-01-06
  • 全国人大常委会执法检查组在江苏开展大气污染防治法执法检查 2019-01-06
  • 2017年山西省“十强报刊”巡礼 2019-01-02